What The Chip Happened?

What The Chip Happened?

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What The Chip Happened?
What The Chip Happened?
Inside the AI Supercycle: Cadence’s Design Dominance, Rambus’ DDR5 Rally, Amkor’s Fan-Out Breakthrough

Inside the AI Supercycle: Cadence’s Design Dominance, Rambus’ DDR5 Rally, Amkor’s Fan-Out Breakthrough

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Jose Najarro
Jul 30, 2025
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What The Chip Happened?
What The Chip Happened?
Inside the AI Supercycle: Cadence’s Design Dominance, Rambus’ DDR5 Rally, Amkor’s Fan-Out Breakthrough
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Welcome, AI & Semiconductor Investors,
Is the AI hardware wave just getting started? Cadence Design Systems and Rambus both shattered revenue records, riding surging demand for AI-driven chips and next-gen memory. Meanwhile, Amkor’s pioneering High-Density Fan-Out technology signals a major shift in advanced packaging, highlighting why investors can't afford to overlook this accelerating AI infrastructure boom. — Let’s Chip In

What The Chip Happened?

🚀 Cadence Raises 2025 Outlook on AI‑Fueled Design Boom
🔧 Fifth Straight Record: Rambus Keeps the DDR5 Engine Humming
🎯 Fan‑Out Frenzy Pushes Amkor to Record AI Momentum
[Cadence’s Q2 Beat Powers Guidance Hike Amid AI Supercycle]

Read time: 7 minutes
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Cadence Design Systems (NASDAQ: CDNS)
🚀 Cadence Raises 2025 Outlook on AI‑Fueled Design Boom

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What The Chip: On July 28, 2025, Cadence reported Q2 results that soared past guidance, lifted its full‑year revenue target to 13 % growth, and projected 16 % non‑GAAP EPS growth. Management credited “ongoing broad‑based strength across our AI‑driven product portfolio” and record hardware demand.

The Situation Explained:

🟢 Blow‑out quarter: Revenue climbed 20 % YoY to $1.275 B, while non‑GAAP EPS jumped 29 % to $1.65. Operating margin expanded to 42.8 %.

💻 Hardware on fire: The Palladium Z3 and Protium X3 platforms delivered the best revenue quarter ever, fueled by AI, HPC, and automotive emulation needs.

🤖 Agentic AI momentum: New Cerebrus AI Studio and Verisium agents brought up to 20 % PPA gains and 5‑10× faster chip delivery, winning early adopters at Samsung, STMicro, and others.

📦 3D‑IC & IP tailwinds: Integrity 3D‑IC and Allegro X rode the chiplet wave; IP sales surged 25 %+ YoY, led by HBM4, 224 G SerDes, and the industry’s first LPDDR6 core.

🌐 Geographic resilience: China slipped to 9 % of revenue amid temporary export controls, yet strength elsewhere more than offset the gap; backlog hit a record and book‑to‑bill will remain > 1 in 2025.

⚖️ Regulatory clean slate: A $141 M DOJ/BIS settlement ends legacy China‑sales probes (2015‑21). Cadence reiterated “deep commitment to the highest standards of compliance.”

💸 Cash turbo‑charge: The U.S. One Big Beautiful Bill Act restores immediate R&D expensing, lowering FY‑25 cash taxes by ≈ $140 M—capital Cadence will recycle into buybacks and R&D.

🛠️ Quote to note: CEO Anirudh Devgan: “The AI super‑cycle—from data‑center build‑out to physical AI—keeps accelerating. Customers are embracing our products at scale.”

Why AI/Semiconductor Investors Should Care: Cadence sits at the heart of the AI design flywheel: every jump in chip complexity, every move to chiplets or 3D stacking, and every hardware refresh feeds demand for its EDA, IP, and hardware emulation platforms. Management just proved it can grow faster than the 10 %+ industry CAGR while expanding margins and navigating export‑control turbulence. With a record backlog, a cleared compliance overhang, and the cash‑flow lift from renewed R&D tax incentives, Cadence has fresh headroom to invest—and return capital—right as the AI design race intensifies.


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Rambus (NASDAQ: RMBS)
🔧 Fifth Straight Record: Rambus Keeps the DDR5 Engine Humming

Chart preview

What The Chip: Rambus smashed Q2‑25 expectations on July 28, 2025, posting record product revenue and cash generation thanks to booming DDR5 interface chips and early traction for power‑management companions. Management signaled even faster growth ahead as new products scale and MRDIMM moves closer to reality.

The Situation Explained:

🚀 Product revenue up 43 % YoY to $81.3 million—Rambus’ DDR5 register‑clock driver (RCD) share rose above 40 % and marked a fifth consecutive record quarter. CEO Luc Seraphin: “Our memory‑interface chip business outpaced the market.”

🔌 Companion‑chip ramp begins: PMICs, clock drivers and DB chips contributed low‑single‑digit share of product revenue in Q2 and should hit mid‑ to upper‑single‑digit in Q3 as server and “AI PC” platforms qualify.

💰 Record $94 million cash from operations and $84 million free cash flow pushed the cash pile to $595 million, funding R&D and stock buybacks without debt.

🛠️ Silicon IP momentum: Custom HBM4 and PCIe 7.0 controller deals plus security IP drove a sequential jump in contract revenue; design wins today translate to ASIC tape‑outs in 2026–27.

📦 Inventory lean at ~120 days; CFO Des Lynch plans to hold more “strategic” inventory to support 2026 ramps, yet lead‑times remain normal.

⚠️ DDR4 fades and CXL adoption slips, but management expects MRDIMM chipsets (larger content per DIMM) to enter production 2H 2026, targeting a $600 million SAM versus today’s ~$800 million RDIMM market.

📈 Q3‑25 guidance: revenue $172–178 million, EPS $0.58–0.66, double‑digit sequential product revenue growth and record cash yet again.

🛡️ Growing demand for Rambus hardware‑level security IP as hyperscalers roll out proprietary AI inference ASICs.

Why AI/Semiconductor Investors Should Care: Rambus sits at the nexus of the DDR5 and HBM bandwidth race that underpins every AI server. Record cash flow funds aggressive R&D, letting Rambus extend its franchise from RCDs into higher‑value companion chips and future MRDIMM architectures—all with gross margins north of 70 % on IP. If MRDIMM and AI PC adoption unfold as planned, Rambus’ addressable market could nearly double by 2027, giving shareholders both growth visibility and downside protection through a diversified royalty stream.


Amkor Technology (NASDAQ: AMKR)
🎯 Fan‑Out Frenzy Pushes Amkor to Record AI Momentum

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What The Chip: On July 28, 2025, Amkor posted Q2 FY‑25 revenue of $1.51 billion, up 14 % Q/Q and 3 % Y/Y, crushing the top end of guidance while every end‑market logged double‑digit sequential growth. Management credited rapid product transfers and the first high‑volume High‑Density Fan‑Out (HDFO) program for a key compute customer.

The Situation Explained:

🚀 All cylinders firing. Communications +15 % Q/Q (iOS ecosystem), Computing +16 % (PC & memory ramps), Auto/Industrial +11 %, Consumer +16 %.

🖥️ AI compute surging. H1‑25 compute revenue already +18 % Y/Y; test revenue tied to AI/ HPC devices +50 % Y/Y.

🆕 First HDFO win live. CEO Giel Rutten: “A major milestone… the first High‑Density Fan‑Out product in high‑volume production for our lead customer.” This RDL‑based packaging shrinks cost versus 2.5D interposers and is expandable to next‑gen smartphones.

🏗️ Capacity build‑out. 2025 CapEx $850 M targeting HDFO, advanced SiP, and a new Turnkey test line in Korea (Phase 1 online 4Q‑25; Phase 2 1H‑27) plus the Arizona advanced‑packaging fab beginning construction 2H‑25.

💰 Fortified balance sheet. Cash & short‑term investments $2.0 B, total liquidity $3.1 B after upsizing to a $1 B revolver and adding a $500 M term loan; net debt/EBITDA a modest 1.5×.

📈 Rosy Q3 outlook. Guidance calls for $1.88‑1.98 B revenue (+27 % Q/Q) and gross margin rising to 13‑14.5 % on the seasonal smartphone ramp. EPS seen $0.34‑0.48.

⚠️ Margin headwinds. Vietnam SiP start‑up trimmed Q2 GM by 125 bp; foreign‑exchange shaved another 80 bp. Under‑utilized Japan factories drag profits while management plans footprint rationalization.

🛠️ Watching costs & supply. Substrate tightness looms as AI demand accelerates; Amkor formed a strategic procurement team to lock in capacity.

Why AI/ Semiconductor Investors Should Care: AI hardware’s shift to chiplets and memory‑heavy architectures demands advanced packaging at scale—exactly where Amkor now leads with HDFO, 2.5D, SiP and Turnkey test. The company pairs record compute growth with a war‑chest‑backed expansion into Korea, Vietnam and the U.S., positioning it as a critical linchpin in diversified AI supply chains. Near‑term margin bumps from new fabs and Japan consolidation deserve monitoring, but sustained design wins, robust guidance and a strengthened balance sheet suggest profit leverage once ramps normalize—making AMKR a high‑beta play on the AI packaging boom.


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Disclaimer: This article is intended for educational and informational purposes only and should not be construed as investment advice. Always conduct your own research and consult with a qualified financial advisor before making any investment decisions.


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[Paid Subscribers] Cadence’s Q2 Beat Powers Guidance Hike Amid AI Supercycle

Date of Event: July 28, 2025

Executive Summary

*Reminder: We do not talk about valuations, just an analysis of the earnings/conferences

Cadence Design Systems delivered another stand‑out quarter, pairing double‑digit top‑ and bottom‑line growth with a clean “beat‑and‑raise” performance. Second‑quarter revenue reached $1.275 billion, up 20 % year‑over‑year and $25 million ahead of consensus, while non‑GAAP earnings per share rose 29 % to $1.65—$0.09 above expectations. Chief Executive Officer Anirudh Devgan credited “ongoing broad‑based strength across our AI‑driven product portfolio,” adding that customer bookings “were stronger than expected.” 

Management lifted full‑year targets to $5.21 – $5.27 billion in revenue and $6.85 – $6.95 in non‑GAAP EPS, implying 13% and 16% growth, respectively, at the mid‑points. investor.cadence.com Free cash flow jumped 111 percent to $865 million, enabling $175 million of share repurchases. Cadence also resolved a legacy compliance investigation with U.S. regulators through a one‑time $140.6 million payment, removing a lingering overhang and contributing to a 9 percent share‑price pop following the print.


Growth Opportunities

Agentic AI and design‑automation leadership. Devgan describes the industry entering an “AI super‑cycle” in which exploding chip complexity mandates goal‑driven, autonomous design flows. Cadence’s Cerebrus AI Studio already optimizes multi‑block system‑on‑chip layouts, and more than half of advanced‑node designs now tap the underlying Cerebrus engine. Customers report up to 20 % power‑performance‑area (PPA) gains and 5‑10× faster tape‑outs, underscoring the platform’s strategic weight. 

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